On this page · 5 sections
  1. What the two releases list
  2. The CUDA fix in b11724
  3. The Hexagon changes in b11723
  4. Upgrade checklist
  5. Sources

TL;DR

Two llama.cpp release notes, b11724 and b11723, both list a published date of 2026-10-19 and both touch flash-attention code. b11724 fixes a CUDA shared-memory write-after-read hazard in flash_attn_ext_vec, while b11723 changes Hexagon FLASH_ATTN_EXT for longer context and SWA models. The CUDA fix closes a hazard reported by NVIDIA's compute-sanitizer rather than an observed wrong output, while the Hexagon change brings 2-3x operator-level gains on some models such as gemma-4-26B.

What the two releases list #

Release b11724 lists one change and Release b11723 lists one change with three sub-items. Both builds came out on the same morning, and the pull requests behind them carry the detail that the release pages leave out.

ChangeWho is affectedAction
CUDA: fix shared-memory WAR hazard in flash_attn_ext_vec (#30573), listed in b11724CUDA builds that use flash_attn_ext_vecPick it up with the next routine llama.cpp update; the author observed no incorrect output
hex-fa: support for masked block skipping to reduce DMA fetching, listed in b11723Hexagon NPU users running large ubatches at longer contextUpgrade for fewer wasted DMA transfers on padded and masked blocks
hex-fa: finetuning the hmx->hvx crossover thresholds (boosting gemma-4), listed in b11723Hexagon users running gemma-4 SWA layersUpgrade; HVX runs those layers 2-3x faster than HMX
hex-fa: update hmx gate to account for mdev.count, listed in b11723Hexagon setups with more than one NPUNo action; the crossover now counts all HVX units across NPUs

The CUDA fix in b11724 #

According to pull request #30573, the KV loop in flash_attn_ext_vec reuses a shared KQ buffer between iterations. A warp barrier separated writing the scores from reading them for V accumulation, but nothing stopped the next iteration from overwriting them before every lane had finished reading. The fix adds ggml_cuda_syncwarp() at the end of the loop; a warp barrier is enough because the reads stay within the writing warp.

The author states: "I have not observed incorrect output from this race. Compute-sanitizer reports the write-after-read hazards." On an RTX 3090 (sm_86), racecheck on FLASH_ATTN_EXT with hsk=256 and nb=1 went from 8,007,424 WAR warnings before the fix to zero after, and the full FLASH_ATTN_EXT correctness suite passed 3993 of 3993 tests afterwards. The fix is a correctness hardening, not a response to reported wrong answers, so there is no reason to treat earlier CUDA builds as having produced bad output.

The Hexagon changes in b11723 #

Release b11723 lists "hexagon: FLASH_ATTN_EXT improvements for longer context and SWA models ( #30731 )". In pull request #30731, the author explains that HMX was being used on the gemma-4 SWA layers, where HVX turned out to be 2-3x faster, so the HMX-to-HVX crossover point was retuned; for multi-NPU sets the crossover uses the total number of HVX units, which is the mdev.count change.

The masked block skipping targets large ubatches, 1K by default and sometimes 2K, where padding and masking meant more data was fetched by DMA and then ignored in the inner loops. The change scans the mask earlier and skips those DMAs. The author reports 2-3x gains at the raw operator level on some models such as gemma-4-26B, and end-to-end gains of 1-2 tokens per second at context lengths above 8K.

Upgrade checklist #

  1. Check which llama.cpp build is deployed; any build from b11724 onwards contains both changes.
  2. On CUDA, take the fix with the next routine update; the author saw no incorrect output from the race.
  3. On Snapdragon Hexagon, prefer b11723 or later for gemma-4 and other SWA models and for contexts above 8K.
  4. Expect end-to-end gains of 1-2 tokens per second rather than the 2-3x operator-level figure.

The Sentinel’s Call

Neither build is urgent. The CUDA race was found by compute-sanitizer and never seen to corrupt output, so it can wait for a routine update. Hexagon users with gemma-4 or long contexts gain the most, although the end-to-end gain is far smaller than the operator-level one.

Our judgement, drawn only from the facts and sources above.

Sources

  1. ggml-org/llama.cpp#30573: CUDA: fix shared-memory WAR hazard in flash_attn_ext_vec github.com · Oct 19, 2026
  2. ggml-org/llama.cpp#30731: hexagon: FLASH_ATTN_EXT improvements for longer context and SWA models github.com · Oct 19, 2026
  3. Release b11724 · ggml-org/llama.cpp · GitHub github.com · Oct 19, 2026
  4. Release b11723 · ggml-org/llama.cpp · GitHub github.com · Oct 19, 2026

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Edited and approved by Jarosław Krzemiński. Spotted a mistake? Report a correction or read the corrections policy.